@hjups

The DE1 SoC only has 1GB of DRAM on it and it's a dual core A9 (that does matter, because the A7 and A9 are different architectures). It's a 32-bit CPU though, so the max address space is 4GB, with a maximum of 1GB mappable to DRAM (the other 3GB are mapped to the FPGA and to I/O).
You should have mentioned the Max10 boards as well - those are great low cost options for beginners.
As for CPLDs... I would not recommend those for beginners, and I would avoid them for tinkering. The only reason to get a CPLD dev board is if you have an actual application that needs a CPLD and you need to prototype the circuit before you spin up the PCB. In many cases though, prototyping with a FPGA you have laying around would be sufficient (unless you're worried about timings, in which case you need the actual CPLD). Demonstration with a CPLD is fine, but if not stressed, I would be worried that someone might buy a CPLD board not knowing the limitations, and end up with a paperweight. Furthermore, as I recall, most CPLDs are flash programmed, meaning you can only write a bitstream to them so many times before they can no longer retain the bits. The Max10 is similar, except you can load a bitstream via JTAG into SRAM rather than the flash for prototyping.

@SaarN1337

That's cool.
I have the Terasic DE10 and I've just ordered 2 Tang-Nanos from Aliexpress and and IceStick from Digi-Key.
Would like to see how they perform in comparison to Intel.
Anyway, I'm just a beginner (uni student), so I'll join along the ride!
Looking forward for more content :)